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This document describes macro-models of integrated circuits (ICs) to simulate conducted electromagnetic emissions on a printed circuit board. This modelling is commonly called Integrated Circuit Emission Model Conducted Emission (ICEM-CE). The ICEM-CE model is also intended for modelling a chip circuit, a function block and a programmable circuit (IP). The ICEM-CE model can be applied to modelling of analogue and digital ICs. There are mainly two causes for conducted emissions: - conducted emissions through power supply terminals and reference ground structures; - conducted emissions through input/output terminals (I/O). The ICEM-CE model takes these two causes into account in a single approach. This standard defines structures and components of macro-modelling for EMI simulation, taking into account internal activities of integrated circuits. This standard specifies general data which can be implemented in different formats or languages, for instance, IBIS, IMIC, SPICE, VHDL-AMS and Verilog. The SPICE format has been chosen as standard for the simulation environment in order to cover all conducted emissions. This standard also specifies the requirements for information which shall be incorporated into every ICEM-CE model or in subcomponents for model circulation; the description of syntax is not included in this standard. The responsible Committee is K 631 "Halbleiterbauelemente" ("Semiconductor devices") of the DKE (German Commission for Electrical, Electronic and Information Technologies).
This document has been replaced by: DIN EN 62433-2:2017-10; VDE 0847-33-2:2017-10 .