Standard
[WITHDRAWN]
ISO 26262-5:2011-11
Road vehicles - Functional safety - Part 5: Product development at the hardware level
German title
Straßenfahrzeuge - Funktionale Sicherheit - Teil 5: Produktentwicklung - Hardware-Ebene
Publication date
2011-11
Original language
English
Pages
76
Publication date
2011-11
Original language
English
Pages
76
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Content
Content (en)
Foreword
Introduction
Scope
Normative references
Terms, definitions and abbreviated terms
Requirements for compliance
Show subsection Close subsection General requirements
Interpretations of tables
ASIL-dependent requirements and recommendations
Initiation of product development at the hardware level
Show subsection Close subsection Objectives
General
Inputs to this clause
Show subsection Close subsection Prerequisites
Further supporting information
Requirements and recommendations
Work products
Specification of hardware safety requirements
Show subsection Close subsection Objectives
General
Inputs to this clause
Show subsection Close subsection Prerequisites
Further supporting information
Requirements and recommendations
Work products
Hardware design
Show subsection Close subsection Objectives
General
Inputs to this clause
Show subsection Close subsection Prerequisites
Further supporting information
Requirements and recommendations
Show subsection Close subsection Hardware architectural design
Hardware detailed design
Safety analyses
Verification of hardware design
Production, operation, service and decommissioning
Work products
Evaluation of the hardware architectural metrics
Show subsection Close subsection Objectives
General
Inputs of this clause
Show subsection Close subsection Prerequisites
Further supporting information
Requirements and recommendations
Work products
Evaluation of safety goal violations due to random hardware failures
Show subsection Close subsection Objectives
General
Inputs to this clause
Show subsection Close subsection Prerequisites
Further supporting information
Requirements and recommendations
Show subsection Close subsection General
Evaluation of Probabilistic Metric for random Hardware Failures (PMHF)
Evaluation of each cause of safety goal violation
Verification review
Work products
Hardware integration and testing
Show subsection Close subsection Objectives
General
Inputs of this clause
Show subsection Close subsection Prerequisites
Further supporting information
Requirements and recommendations
Work products
Overview of and workflow of product development at the hardware level (informative)
Failure mode classification of a hardware element (informative)
Hardware architectural metrics (normative)
Show subsection Close subsection Fault classification and diagnostic coverage
Single-point fault metric
Latent-fault metric
Evaluation of the diagnostic coverage (informative)
Show subsection Close subsection General
Overview of techniques for embedded diagnostic self-tests
Show subsection Close subsection Electrical
Show subsection Close subsection Failure detection by on-line monitoring
Comparator
Majority voter
Electronic
Show subsection Close subsection Dynamic principles
Analogue signal monitoring in preference to digital on/off states
Processing units
Show subsection Close subsection Self-test by software
Self-test supported by hardware (one-channel)
Self-test by software cross exchanged between two independent units
Software diversified redundancy (one hardware channel)
Reciprocal comparison by software in separate processing units
HW redundancy (e.g. Dual Core Lockstep, asymmetric redundancy, coded processing)
Configuration register test
Stack over/under flow detection
Integrated hardware consistency monitoring
Non-volatile memory
Show subsection Close subsection Memory monitoring using error-detection-correction codes (EDC)
Modified checksum
Memory signature
Block replication (for example double memory with hardware or software comparison)
Volatile memory
Show subsection Close subsection RAM Pattern test
Parity bit
RAM March test
Running checksum/CRC
I/O-units and interfaces
Show subsection Close subsection Test pattern
Code protection
Multi-channel parallel output
Monitored outputs
Input comparison/voting
Communication bus
Show subsection Close subsection One-bit hardware redundancy
Multi-bit hardware redundancy
Complete hardware redundancy
Inspection using test patterns
Transmission redundancy
Information redundancy
Frame counter
Timeout monitoring
Read back of sent message
Power supply
Show subsection Close subsection Voltage or current control (input)
Voltage or current control (output)
Temporal and logical program sequence monitoring
Show subsection Close subsection Watchdog with separate time base without time-window
Watchdog with separate time base and time-window
Logical monitoring of program sequence
Combination of temporal and logical monitoring of program sequences
Combination of temporal and logical monitoring of program sequences with time dependency
Sensors
Show subsection Close subsection Sensor valid range
Sensor correlation
Sensor rationality check
Actuators
Show subsection Close subsection Example calculation of hardware architectural metrics: “single-point fault metric” and “latent-fault metric” (informative)
Application of scaling factors (informative)
Bibliography
Cooperation at DIN
Please get in touch with the relevant contact person at DIN if you have problems understanding the content of the standard or need advice on how to apply it.
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