Standard
[CURRENT]
EIA JESD 82-29A.01:2022-09
Definition of the SSTE32882 Registering Clock Driver with Parity and Quad Chip Selects for DDR3/DDR3L/DDR3U RDIMM 1.5 V/1.35 V/1.25 V Applications
- Publication date
-
2022-09
- Information
-
- Original language
-
English
- Pages
- 78
- Publication date
-
2022-09
- Information
-
- Original language
-
English
- Pages
- 78
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