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DIN EN 61193-3:2013-11

Quality assessment systems - Part 3: Selection and use of sampling plans for printed board and laminate end-product and in-process auditing (IEC 61193-3:2013); German version EN 61193-3:2013

German title
Qualitätsbewertungssysteme - Teil 3: Auswahl und Anwendung von Stichprobenanweisungen für Endprodukte von Leiterplatten und Laminaten und fertigungsbegleitende Auditierung (IEC 61193-3:2013); Deutsche Fassung EN 61193-3:2013
Publication date
2013-11
Original language
German
Pages
67

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Publication date
2013-11
Original language
German
Pages
67
DOI
https://dx.doi.org/10.31030/2062661

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Overview

This part of IEC 61193 contains sampling plans for inspection by attributes, including sample plan selection criteria and implementation procedures for printed board and laminate end-product and in-process auditing. The principles established herein permit the use of different sampling plans that may be applied to an individual attribute or set of attributes, according to classification of importance of the attribute(s) with regard to form, fit and function. A clear description in IEC standards and specifications and their reference to sampling plans in order to insure adherence to customer requirements is essential. All the details should be clear as to their implementation or adjustment for evaluation of the product to be shipped, the use of process control and SPC, or the applicability for using these principles in controlled experimentation. The general characteristics of these principles relate to a gradual reduction that might be needed in examining the product being manufactured. As such, they are sometimes referred to as the logical steps to process improvement. These steps are as follows: - Statistical sampling: To determine a proper amount of examples from a given lot of product and using statistics to evaluate the occurrence of anomalies. - Zero defect standards: To adopt the role of attempting to achieve no defects in a production lot through the recommendations identified in standards or specifications that define the product requirements. - Economics: To establish the highest level of non-conforming product characteristics, determining the cost that is incurred when these are discovered or delivered accidentally to the customer (cost of quality) and establishing an acceptable quality assessment methodology in order to reduce these occurrences. - SPC reduced inspection: To create a process control program that is based on reject criteria, followed by controlled experimentation to improve the process and then using statistical analysis in order to determine that the process improvement has reduced the occurrences of these reject criteria. The explosion of the electronics industry has led to a situation where the design of the printed board mounting structure or the material used to produce the product is so complex, that the quality level of these items delivered with known failures are no longer acceptable. The acceptable number of non-conforming products should be directed toward approaching zero in producer-customer contracts. This has led to the development of new methods of quality assurance like the application of Statistical Process Control (SPC). The low number of permitted non-conforming product according to the AQL tables caused many to resort to 100 % testing or inspection. At the same time the quality thinking has developed so that the idea to accept failures has become impossible, and the use of the AQL tables in the traditional way has been diminishing very rapidly. There is a considerable amount of ISO standards in regards to sampling procedures for inspection. However, most of these standards include sampling plans allowing for the acceptance of a lot, even though the inspected sample has one or more non-conforming elements, although there are a few exceptions (ISO 18414 and ISO 21247). The responsible committee is DKE/K 682 "Montageverfahren für elektronische Baugruppen" ("Electronics assembly technology") of the DKE (German Commission for Electrical, Electronic and Information Technologies) at DIN and VDE.

ICS
31.180
DOI
https://dx.doi.org/10.31030/2062661

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